VLSI with Vikas

Disclaimer:The postings on this site are my own and do not necessarily reflect the views of my employer.

Wednesday, 13 July 2016

Highlights of DVCON -16, USA

Amiq Consulting presents highlights of DVCON -16, USA, covering our paper " A 360 Degree View of UVM Events".

Link : http://www.amiq.com/consulting/2016/04/07/highlights-of-dvcon-us-2016/


Posted by Vikas Billa at 02:43 No comments:
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Sunday, 3 July 2016

Adopting Metric Driven Verification for effective Verification in conjunction with Universal Verification Methodology


This paper is selected for Cadence CDN Live -2016, EMEA , Germany, please find the slides for the same.










Happy Reading ..!
Posted by Vikas Billa at 23:08 No comments:
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