Saturday 27 June 2015

Insertion of Pragmas in Source Code using Cshell Script

Their was a requirement to develop a script to add pragma to the code in order to encrypt the source code.We need to add `protect begin and `protect end between module and end module of .v files.

Original .v file:

 module chip( MINUS,PLUS );

  output wreal PLUS;
  input wreal MINUS;

  parameter elite  = 0;
   parameter coffee = 1;
   parameter club   = 1;

    $display("elite  = %d" , elite );
    $display("coffee = %d" , coffee);
    $display("club   = %d" , club  );

// comments 
// parameter

Output .v file:

 module chip( MINUS,PLUS );

  output wreal PLUS;
  input wreal MINUS;

  parameter elite  = 0;
   parameter coffee = 1;
   parameter club   = 1; 

  `protect begin


    $display("elite  = %d" , elite );
    $display("coffee = %d" , coffee);
    $display("club   = %d" , club  );

 `protect end

// comments 
// parameter

The script was written in cshell as stated below

#! /bin/csh -fx

setenv RUN_DIR $PWD

set filename = $RUN_DIR/test_list.txt  # test_list.txt gives list of all .v files
set temp = temp                        # temp variable
set file = file                        # file variable

foreach filelocal (`cat $filename`)    # foreach is reading each file in test_list

  echo $filelocal

  # Removing Tempfiles
  rm -rf $file$temp                    # Removing temporary in between generated files
  rm -rf $file

  # Removing comments in the file
  cat $filelocal | sed 's/\/\/.*$//' > $file  # Making sure to remove all comment " // " lines from the orginal .v file ($filelocal) and piping to a temporary file ($file)

  #Counting total lines of the file
  set count = `cat $file | wc -l`             # counting the entire lines of the file ($file)

  # Finding the last line for the grep item
  set final = `grep -n "input\|output\|parameter\|inout" $file | sed 's/:/ /g' | awk '{print $1}' | tail -n 1 `  # Here we are greping the various fields as stated , here up to parameter and finding the line number

  echo $final

  head -$final $file > $file$temp # Then we are sending the contents of the lines up to the parameter to a new file

  echo \`protect begin >> $file$temp # Then printing the `protect begin to the new file

  # Finding the last line for the grep item
  set end = `grep -n "endmodule" $file | sed 's/:/ /g' | awk '{print $1}' | tail -n 1 ` # Finding the endmodule line here
  echo $end

  # printing between Lines
  set final = `expr $final + 1`
  set end = `expr $end - 1`

  sed -n $final,{$end}p $file >> $file$temp # Printing all the lines between after parameter last line to endmoule before line

  echo \`protect end >> $file$temp # Printing the `protect end
  echo endmodule >> $file$temp # Printing endmodule

   #printing end lines
  set end = `grep -n "endmodule" $file | sed 's/:/ /g' | awk '{print $1}' | tail -n 1 `
  set rem = `expr $count - $end`
  tail -$rem $file >> $file$temp # Printing the ending lines after endmdule

  # Copying the local file to orginal file
  cp -rf $file$temp $filelocal  # Copying the temporary file back to original file


Thanks for reading this post ..!

Saturday 13 June 2015

DAC-15 Highlights

Design Automation Conference got an outstanding response, around 800 papers were submitted this year in which 200 papers were finalized.  All keynote presentations were very interesting especially the smart lens  speech by Brain Otis ,Director from Google was really amazing. Vivek Singh speech on Moore’s law at fifty was another highlight , his presentation was outstanding especially the ending slide which shows the Moore Photograph.

My Interaction with Cliff Cummings ( Sunburst Design) , Dave Rich ( Verification Academy) helped me in understanding UVM concepts in depth.

My presentation was satisfactory received positive response from the audience , heard the next big turn in verification is simAccel ( Simulation + Acceleration) and  VIP vendors are about to start this in full-swing.

At last it was a satisfactory trip with thought provoking discussions.

Saturday 23 May 2015

Verification Management: Scripting makes Life Easier

Increase in demand for high quality Verification IP’s and shortening design cycles puts pressure on IP houses to leverage automation in verification process. This shows that the management of data and process are important to an efficient and productive verification environment. Using a built in system like Questa VRM (Verification Run Manager) and Cadence Emanager can give Verification Engineers maximum throughput and the benefits of automation but companies who can’t afford licenses for a long period can develop their own automation scripts for the verification process.

Often automation scripts are heavily scripted by an individual and are carried out from project to project, majority of the team don’t know what actually the script is doing and they just simply use it until and unless it works fine for them. To get the full benefits of the automation script, an individual needs to understand what actually the script does.

You may be asking me why should I make the effort of learning how to script? The Simple answer is it will likely start to impact our job in the near future if we do not. As systems get increasingly larger and more complex, the time spent in verification process consumes an increasing sum of time.

Two main justifying reasons to script a task:

1)     It is repetitive, time consuming or overly tedious
2)     Human Error must be reduced to as close to zero as possible


We developed an automation script in cshell that performs 70% of functionality what actually a built in Verification management does. Our script has the ability to automate management of seeds for constrained random tests, re-run failed tests automatically perhaps with more debug visibility, merge coverage across multiple runs, manage tool time-outs, to name just a few functions.

The features available in this script include:

·         Single test case run with coverage on and off.
·         Multiple test case run with coverage on and off.
·         Single test case run with particular seed number.
·         Graph analysis of regression results.
·         Regression Results distribution to team.
All required options can be passed through command line or through a configuration file. Some of these switches include
<script_name> <layer>  : Runs Regression with functional coverage enable.

Note: <layer> specifies either protocol , link ,physical layer specific tests to  USB3.

<script_name>  <layer> cov_off : Runs Regression with functional coverage off.

<script_name>  <test_name>  cov_off  re_run seed <seed_number>: Re-run a single test case with a particular seed number.

A set of analysis has been performed on the scripts and observed that the users Productivity is being boosted across many different aspects of verification management including capacity, performance, resource usage, turn-around time, preparation, maintenance etc...In conclusion, the user has to be careful in selecting the options based upon his requirements.

So would you like to try to use scripts to reduce verification efforts? I would like to hear from all of you.

Saturday 16 May 2015

Is Moore’s Law really dead?

Thanks for viewing my earlier post and suggesting accordingly.

      Figure 1 :  Audience Statistics 
As discussed in the my earlier post Moore’s statement is an observation on the number of transistors on a chip that increases exponentially  and he didn't mention on the speed , Architecture ,size and cost of the chip.

Is Moore’s Law really dead?

The short answer for now, not yet, but it might be going to end in near future. Recently Researchers have warned that the era of exponent graph may come to end , I don’t want to argue on the forecast but we need to focus on other alternatives such as.

     1.       New Material to Replace silicon.
     2.       Advance Manufacturer Techniques.
     3.       3D Transistors. ( I will discuss in-depth in future posts)

Figure 2 :  Appreciation by NXP for my Poster Presentation on 3D Transistors and Bio-Neuro Chips in  year 2011 

The law of physics doesn't allow chip size to shrink below to an extent , Researchers predicts that it might shrink up to 5 nm by 2020.

According to me the day when chip maker can’t get returns on the billions he invested that is the end of Moore’s prediction.

Long Live Moore's Prediction.

Thanks in advance for Reading the Post.

 Next i will be Posting few articles on UVM along with my friends and colleagues with subject (UVM with Vikas). 

Stay  Tuned ...

Sunday 3 May 2015

Moore’s Law Marks 50 years

This Year Moore’s Law Marks 50 years. Gordon More , the co-founder of Intel made this Prediction in 1965, that the number of transistors will double every year, while the cost of production remains same.

Gordon More

Does this is an Observation or Law or Rule ?

            Does this as an end ?

                     Does Companies sustain without this ?

    Let us discuss.

1.           Observation or Law or Rule :  Law or Rule doesn't change but Observations can. From 1965 to 1975 the number of transistors doubled every year but  from 2008 it slowed down to around 2 to 3 years approximately. Even Gordon More didn't call it has a Law, he said that things changes exponentially.  So this is an Observation.

                                                                                   Shrinking Feature Size

2.         Will Moore’s Law has an Expiry Date : As per nature everything has an end, what about Moore’s law ? Does it has an end ? Then how companies sustain? Does a new technology has to be evolved or is there an alternative solution ? Researchers predicted that Transistor shrinkage can happen only up to 2021? What next ? Instead of segueing Transistors chip makers are coming up with 3D Transistors i.e. stacking Transistors in to Layers. There is a saying in real estate; when land get expensive, multi-storied buildings are the alternative solution.

   3D Architecture

                                                   Gordon More's Initial Sketch of his Observation

In my next blog I will come up with the Reasons why Moore’s Law need to end ? and the devil factors which is going to make it buried.I will also Discuss on 3D Architecture and its Market Trends in the following post.

Thanks for Reading and suggestions are Welcome ..